1. Field
Various embodiments of the present invention relate to a semiconductor device, a semiconductor memory device, and a memory system.
2. Description of the Related Art
Fuses are used for various semiconductor devices, for example, a semiconductor memory device. A laser fuse may output a signal or data, having a logic value that varies according to whether or not the laser fuse is cut. An E-fuse may output a signal having a logic value that varies according to whether or not a gate oxide of a transistor forming E-fuse is ruptured.
A semiconductor memory device utilizes a redundancy scheme in which a normal cell with a fail (hereinafter, referred to as a failed cell) is replaced with a redundancy cell to improve the manufacturing yield. If a failed cell is detected in a test procedure after a wafer process is completed, the failed cell should be replaced with a redundancy cell. Therefore, the address of the failed cell needs to be stored. To store the address of the failed cell, a laser fuse or an E-fuse is generally used. If the laser fuse and the E-fuse are programmed once, the logic value of data may not be changed. For example, after a laser fuse is cut, it may be impossible to recover the laser fuse to an original state, and, after an E-fuse is ruptured, it may be impossible to recover the E-fuse to an original state. Thus, a memory cell, which may not be recovered to its original state after data is programmed once, is referred to as a one-time program cell.
FIG. 1 is a block diagram illustrating a conventional semiconductor memory device.
Referring to FIG. 1, the semiconductor memory device includes a memory cell array 110 having a plurality of memory cells, a row circuit 120 for activating a word line selected by a row address R_ADD, and a column circuit 130 for accessing, that is, reading or writing, the data of a bit line selected by a column address C_ADD.
A row fuse circuit 140 stores a row address corresponding to a failed memory cell in the memory cell array 110, as a repair row address REPAIR_R_ADD, A row comparison block 150 compares the repair row address REPAIR_R_ADD stored in the row fuse circuit 140 and the row address R_ADD inputted from the exterior of the semiconductor memory device. When the repair row address REPAIR_R_ADD coincides with the row address R_ADD, the row comparison block 150 controls the row circuit 120 to activate a redundancy word line in place of a word line designated by the row address R_ADD. That is, a row, such as a normal word line, corresponding to the repair row address REPAIR_R_ADD stored in the row fuse circuit 140 is replaced with a redundancy row such as, a redundancy word line.
The reference symbol ACT denotes an active command, PRE a precharge command, RD a read command, and WT a write command.
The row fuse circuit 140 generally uses laser fuses. Although the programming of the laser fuses may be possible only in a wafer state, it may be impossible to program the laser fuses after the semiconductor memory device is packaged. Therefore, in the case of using laser fuses, a failed cell may not be repaired after the semiconductor memory device is packaged.
To overcome such a disadvantage, an E-fuse is used. The E-fuse is formed as a transistor, and is a fuse which stores data by changing the resistance between a gate and a drain/source.
FIG. 2 is a block diagram illustrating a conventional semiconductor memory device having a nonvolatile memory for storing repair data.
Referring to FIG. 2, it may be seen that the row fuse circuit 140 is removed from the semiconductor memory device shown in FIG. 1 and a nonvolatile memory 210 and a latch block 220 are added.
The nonvolatile memory 210 and a latch block 220 replace the row fuse circuit 140. A row address corresponding to a failed memory cell in the memory cell array 110 is stored in the nonvolatile memory 210, as a repair row address. The nonvolatile memory 210 may be any one of nonvolatile memories such as an E-fuse array circuit, a NAND flash memory, a NOR flash memory, a magnetic random access memory (MRAM), a spin torque transfer magnetic random access memory (STT-MRAM), a resistive random access memory (ReRAM) and a phase change random access memory (PCRAM).
The latch block 220 receives and stores repair data REPAIR_DATA, such as, a fail address, stored in the nonvolatile memory 210. The repair data REPAIR_DATA stored in the latch block 220 is used in a redundancy operation. The latch block 220 includes latch circuits, and may store the repair data REPAIR_DATA only while power is supplied. An operation, in which the repair data REPAIR_DATA is transmitted from the nonvolatile memory 210 to the latch block 220 and is stored in the latch block 220, is referred to as a boot-up operation.
The repair data REPAIR_DATA stored in the nonvolatile memory 210 is not directly used and is transmitted to and stored in the latch block 210 since when the nonvolatile memory 210 is formed in an array type, a predetermined time is required to call the data stored in the nonvolatile memory 210. Since the immediate call of data may be impossible, a redundancy operation may not be performed by directly using the data stored in the nonvolatile memory 210. Therefore, a boot-up operation, in which the repair data stored in the nonvolatile memory 210 is transmitted to and stored in the latch block 200 is performed, and a redundancy operation is performed using the data stored in the latch block 220, after the boot-up operation is performed.
As the row fuse circuit 140 formed of laser fuses is replaced with the nonvolatile memory 210 and the latch block 220, an additional fail which occurs after a wafer state, may be repaired. Research has been made for a technology capable of repairing a fail occurring after the fabrication of a semiconductor memory device, by accessing the nonvolatile memory 210 even after the fabrication of the semiconductor memory device, for example, after the sale of a product.